Workshop
Best Practices of Hardware/Firmware Interface Design
Avoid $1,000,000 chip respins with best practices customized to your company.
Implementing these best practices can help reduce the number of chip respins, save your company time and money,
and increase the quality of your products.
In this workshop, we present over 200 best practices of hardware/firmware interface design and explore the fundamental principles
behind these practices.
We also teach attendees how to customize, adapt, and expand these best practices for your specific development processes.
Your engineers will emerge from the workshop with a set of best practices tailored to your environment through collaboration
and consensus, a process that can promote acceptance and integration of these practices into your organization.
“I just wanted to tell you that your
one-day class was incredibly valuable!”
Keith Huster, Senior Electrical Engineer, Hill-Rom
Length
- 3-4 days (lecture plus developing own practices)
- 1 day (lecture only of abbreviated content)
Audience
- For best results, audience should consist of both hardware engineers and firmware engineers that are already working together developing embedded products
- The ideal class size is 10 to 20 engineers
Materials Provided
- Handouts: Copies of the slides for taking notes
- Book: Hardware/Firmware Interface Design: Best Practices for Improving Embedded Systems Development
Prerequisites
- Hardware engineers: Experience and familiarity in front-end chip design
- Firmware engineers: Experience and familiarity in writing firmware to control hardware
Outline
- Introduction
- What Is the Hardware/Firmware Interface?
- What Is a Best Practice?
- “First Time Right” Also Means ...
- Target Audience
- Project Life Cycle
- Case Study
- Principles
- Seven Principles of Hardware/Firmware Interface Design
- Collaboration
- First Steps
- Formal Collaboration
- Informal Collaboration
- Planning
- Industry Standards
- Common Version
- Compatibility
- Defects
- Analysis
- Post Mortem
- Documentation
- Types
- Document Management
- Reviews
- Content
- Registers
- Bits
- Interrupts
- Time
- Errors
- Information
- Superblock
- Benefits of a Superblock
- Consolidation
- I/O Signals
- Parameterization
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- Design
- Event Notification
- Performance
- Power-On
- Communication & Control
- Registers
- Addressing
- Bit Assignment
- Data Types
- Hardware Identification
- Communication & Control
- Interrupts
- Design
- Pending Register
- Enable Register
- Optional Registers
- Interrupt Module Review
- Triggering on Both Edges
- Using the Interrupt Module
- Aborts, etc.
- Definitions
- Halts
- Resets
- Aborts
- Hooks
- Designing for Hooks
- Peek ...
- ... and Poke
- Monitor
- More Hooks
- Firmware
- Configuration Management
- Temporary Hooks
- Permanent Hooks
- Conclusion
- Key Points
- Benefits
- Seven Principles of Hardware/Firmware Interface Design
- It Finally Works! Let’s Ship It!
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Learn More
To request pricing or dates, or for more information about this course, e-mail
or call 208-939-6984 to set up a workshop.
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