Registers

February 28, 2008
Published by Gary Stringham at February 28, 2008
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Documenting Registers

Much of firmware development focuses on interfacing with registers. Documentation plays a key role in this effort since engineers must refer to it constantly to look up register and bit details. In particular, engineers need to generate or decode hex numbers, where the value of each bit must be clearly […]
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March 31, 2008
Published by Gary Stringham at March 31, 2008
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More on Documenting Registers

Last month’s newsletter discussed some best practices for documenting register layouts, illustrating key points with a sample register diagram. One reader, Joel Saks, noted that my register diagram did not clearly indicate whether the bits were read/write bits or read-only bits. Joel makes an excellent point and also exposes one […]
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January 30, 2010
Published by Gary Stringham at January 30, 2010
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Register Design Eliminates Read-Modify-Write Issues

In the last two articles (here and here,) I discussed the dangers of read-modify-write operations on registers that create exposure to collision and corruptions by firmware. I discussed certain firmware and CPU techniques that can reduce these dangers, but not completely eliminate them. As promised, this month I will discuss […]
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July 14, 2010
Published by Gary Stringham at July 14, 2010
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Verification: Can We Do More?

A comment in the GABEonEDA blog entry “Accellera Works Toward a Unified Verification Methodology (UVM)” recently caught my attention: Silicon respins due to design errors not only have not diminished in number, they have actually increased. This is an indication that complexity has grown more than the ability of verification […]
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